This invention relates to a composition for filling holes in a substrate wherein the substrate can be part of a multi-layer printed circuit board or chip carrier. Specifically this invention defines a new and unique hole fill composition and method of filling such holes in a substrate which provides a substantially planar substrate surface at the filled hole locations wherein the filled hole substrate can form part of the completed multi-layer printed circuit board or chip carrier.
Many known current printed circuit board constructions require one or more external conductive layers, e.g., circuitry and/or pads for mounting components thereon, and, given today""s increased functional demands, a plurality of internal conductive planes, e.g., signal, power and/or ground. To provide effective interconnections between such surface components and the board""s conductive circuitry, internal planes and/or pads, the use of conductive through holes has been adopted wherein several such holes are formed in the board and electrically coupled in a selective manner to internal and external conductive elements. Such holes typically include a conductive, e.g., copper, layer as part thereof which in turn contacts the also typically copper circuitry, pads and/or internal planes.
The term xe2x80x9cthrough holexe2x80x9d or simply xe2x80x9cholexe2x80x9d as used herein is meant to include both conductive and non-conductive apertures which may extend entirely through the circuit board or even only partly therethrough (such partial holes are often also called xe2x80x9cviasxe2x80x9d in the circuit board field), including between only one or more internal layers without being externally exposed. Examples of various circuit board structures which include holes of these types are defined in several published documents, including the following U.S. Letters Patents, issued on the dates identified:
All of these patents are assigned to the same assignee as the present invention and are incorporated herein by reference.
Printed circuit boards of all the above type are particularly adapted for having one or more (usually several) electrical components, e.g., semiconductor chips, capacitors, resistors, etc., mounted on an external surface thereof and coupled to various, selected internal conductive planes within the board""s dielectric substrate. As demands for increased levels of integration in semiconductor chips and other electrical components continue, parallel demands call for concurrent increased functional capabilities, e.g., increased circuit densities, in printed circuit boards adapted for use with such components. Such demands further emphasize the growing need for more closely spaced electrical components on the board""s outer surfaces. For those boards possessing greater functional capabilities and therefore which use several through holes therein, it is highly desirable to position the electrical components directly over the holes to maximize board real estate while assuring a compact, miniaturized final board product.
Increased demands such as those above are particularly significant when it is desirable to couple what are referred to as ball grid array (BGA) or similar components directly onto the board""s outer conductive layer(s). These components typically include a semiconductor chip electrically coupled to a plurality of highly dense conductors, e.g., solder ball elements, closely positioned in a fixed pattern on the component""s undersurface. This is also the case for directly mounted semiconductor chips (also known in this technology as direct chip attach (or DCA) components) wherein a dense pattern of several minute solder balls are arranged on the chip""s small undersurface (that directly facing the underlying circuit board). In this case, the circuit board may also be referred to as a chip carrier.
In many of today""s advanced chip carriers, the basic building block of the chip carrier is a metal ground plane that has been etched to form a personalized ground plane having clearance holes. The personalized ground plane can then be laminated on both sides with a fluoropolymer or other dielectric material and a metal foil, preferably copper foil. The metal foil is then circuitized to form a signal carrying layer. This circuitized structure may be defined as a signal core. Subsequent additions of fluoropolymer or other dielectric layers and metal foil layers are xe2x80x9cbuilt upxe2x80x9d on the signal core and can form power and additional signals layers which are ultimately built up to a multilayer chip carrier structure. The presence of clearance holes in a signal core may lead to a non-planar signal core outside surface which can affect the planarity of subsequent layers xe2x80x9cbuilt upxe2x80x9d on the signal core (and ultimately the planarity of the surface of the multilayer chip carrier on which the semiconductor chip is to be mounted.) This is believed to be caused by the limited flow characteristics of the fluoropolymer or other dielectric material during the lamination phase of signal core manufacture.
It is believed that a new hole fill composition and a method of making a substrate having at least one hole (and possibly several) therein which is filled with the new hole fill composition will substantially prevent non-planarity of the signal core outside surface and lead to a substantially planar multilayer printed circuit board or chip carrier surface when the signal core is used in the manufacture of the multilayer printed circuit board or chip carrier. This would represent a significant advancement in the art.
Accordingly, it is the object of this invention to provide a new and unique composition which in turn may be used as a hole fill in a metal layer of a substrate.
Another object of this invention is to provide a method of making such a composition.
Yet another object of this invention is to provide a substrate including a metal layer having at least one through hole therein and a mixture of a fluoropolymer dielectric material and a filler material substantially filling the through hole. The mixture will provide a substantially planar filled hole substrate and will improve the planarity of the multilayer printed circuit board or chip carrier of which the substrate is a part.
Still yet another object of the invention is to provide a method of making such a substrate.
The invention is adaptable to mass production and reduces the defect level and lowers the cost of product made with this invention.
According to one aspect of the invention, there is provided a hole fill composition comprising a fluoropolymer dielectric material, a filler material, and a coupling agent, the filler material having at least a partial coating of the coupling agent thereon.
According to another aspect of the invention, there is provided a hole fill composition comprising a fluoropolymer dielectric material, a surfactant, a filler material, and a coupling agent, the filler material having at least a partial coating of the coupling agent thereon.
According to yet another aspect of the invention, there is provided a hole fill composition comprising a fluoropolymer dielectric material, a silica filler material, and a coupling agent, the filler material having at least a partial coating of the coupling agent thereon.
According to still yet another aspect of the invention, there is provided a hole fill composition comprising a fluoropolymer dielectric material, a surfactant, a silica filler material, and a coupling agent, the filler material having at least a partial coating of the coupling agent thereon.
According to another aspect of the invention, there is provided a hole fill composition comprising a fluoropolymer dielectric material, a filler material, and a fluorosilane coupling agent, the filler material having at least a partial coating of the coupling agent thereon.
According to yet another aspect of the invention, there is provided a hole fill composition comprising a fluoropolymer dielectric material, a surfactant, a filler material, and a fluorosilane coupling agent, the filler material having at least a partial coating of the coupling agent thereon.
According to still yet another aspect of the invention, there is provided a method of making a hole fill composition comprising the steps of providing a quantity of a filler material, adding to the quantity of the filler material a quantity of coupling agent to at least partially coat the filler material, adding to the quantity of filler material at least partially coated with the coupling agent a quantity of a fluoropolymer dielectric material, and blending the filler material coated with the coupling agent and the fluoropolymer material.
According to another aspect of the invention, there is provided a method of making a hole fill composition comprising the steps of providing a quantity of a filler material, dissolving a quantity of coupling agent in a first solvent to form a solution, mixing the filler material into the solution to at least partially coat the filler material, drying the filler material at least partially coated with the coupling agent, adding the filler material at least partially coated with the coupling agent to a second solvent, adjusting the pH of the second solvent, dispersing a quantity of a fluoropolymer dielectric material into the second solvent, adding a quantity of a surfactant to the second solvent, and blending the filler material at least partially coated with the coupling agent and the fluoropolymer material.
According to yet another aspect of the invention, there is provided a substrate comprising a metal layer including at least one through hole therein defined by at least one side wall within the metal layer, and a mixture of a fluoropolymer dielectric material and a filler material at least partially coated with a coupling agent positioned on the side wall of the through hole, the mixture substantially filling the through hole in the metal layer.
According to still yet another aspect of the invention, there is provided a substrate comprising a metal layer including at least one through hole therein defined by at least one side wall within the metal layer, and a mixture of a fluoropolymer dielectric material and a silica filler material at least partially coated with a coupling agent positioned on the side wall of the through hole, the mixture substantially filling the through hole in the metal layer.
According to another aspect of the invention, there is provided a substrate comprising a metal layer including at least one through hole therein defined by at least one side wall within the metal layer, and a mixture of a fluoropolymer dielectric material and a filler material at least partially coated with a fluorosilane coupling agent positioned on the side wall of the through hole, the mixture substantially filling the through hole in the metal layer.
According to yet another aspect of the invention, there is provided a method of making a substrate comprising the steps of providing a metal layer including at least one through hole therein defined by at least one side wall within the metal layer, positioning a mixture of a fluoropolymer dielectric material and a filler material at least partially coated with a coupling agent on the side wall of the through hole, and heating the metal layer, the fluoropolymer dielectric material and the filler material at least partially coated with the coupling agent to adhere the dielectric material and the filler material to the side wall, the dielectric material and the filler material substantially filling the through hole.